UNIT – I
Design Concepts:
Digital Hardware, Design process, Design of digital hardware. Introduction to logic circuits – Variables and functions, Logic gates and networks. Boolean algebra, Synthesis using gates, Design examples. Optimized implementation of logic functions using K-Map and Quine-McCluskey Tabular method
UNIT – II
Number representation: Addition and Subtraction of signed and unsigned numbers. Combinational circuit building blocks: Half adder, Full adder, Multiplexers. Decoders. Encoders. Code converters, BCD to 7-segment converter, Arithmetic comparator circuits.
UNIT – III
Design of combinational circuits using Programmable Logic Devices (PLDs): General structure of a Programmable Array Logic (PAL), Programmable Logic Arrays (PLAs), Structure of CPLDs and FPGAs, 2-input and 3-input lookup tables (LUTs) Introduction to Verilog HDL: Verilog code for basic logic gates, adders, decoders.
UNIT – IV
Sequential Circuits: Basic Latch, Gated SR Latch, gated D Latch, Master-Slave edge triggered flip-flops, T Flip-flop, JK Flip-flop, Excitation tables. Registers, Counters, Verilog code for flip-flops
UNIT – V
Synchronous Sequential Circuits: Basic Design Steps, Finite State machine (FSM) representation using Moore and Mealy state models, State minimization, Design of FSM for Sequence Generation and Detection, Algorithmic State Machine charts.
Suggested Readings:
1. Moris Mano and Michael D CIletti, Digital Design, Pearson, fourth edition, 2008
2. Zvi Kohavi, Switching and Finite Automata Theory, 3rd ed., Cambridge University Press-New Delhi, 2011.
3. R. P Jain, Modern Digital Electronics,4th ed., McGraw Hill Education (India) Private Limited, 2003
4. Ronald J.Tocci, Neal S. Widmer &Gregory L.Moss, “Digital Systems: Principles and Applications,” PHI, 10/e, 2009.
5. Samir Palnitkar, “Verilog HDL A Guide to Digital Design and Synthesis,” 2nd Edition, Pearson Education, 2006.
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