Tuesday, 7 October 2014

UNIT-3

29) What are combinational circuits?
A combinational circuit consists of logic gates whose outputs at any time are determined from the present combination of inputs. A combinational circuit performs an operation that can be specified logically by a set of Boolean functions. It consists of input variables, logic gates, and output variables.
30) Give the design procedures for the designing of a combinational circuit.
The procedure involves the following steps, From the specification of the circuit, determine the required number of inputs and outputs and assign a symbol to each. Derive the truth table that defines the required relationships between inputs and outputs. Obtain the simplified Boolean functions for each output as a function of the input variables. Draw the logic diagram and verify the correctness of the design.
31) Define half adder.
A combinational circuit that performs the addition of two bits is called a half adder. A half adder needs two binary inputs and two binary outputs. The input variables designate the augend and addend bits; the output variables produce the sum and carry
32) Define full adder?
A combinational circuit that performs the adtion of three bits is a full adder.It consists of three inputs and two outputs.
33) Define binary adder.
A binary adder is a digital circuit that produces the arithmetic sum of two binary numbers. It can be constructed with full adders constructed in cascade, with the output carry from each full adder connected to the input carry of the next full adder in the chain.
34) What is overflow?
Over flow is a problem in digital computers because the number of bits that hold the number is finite and a result that contains n + 1 bits cannot be accommodated. For this reason many computers detect the occurrence of an overflow, and when it occurs a corresponding flip flop is set that can be checked by the user. An overflow condition can be detected by observing the carry into sign bit position and the carry out of the sign bit position. If these two carries are not equal, an overflow has occurred.
35) Define magnitude comparator?
A magnitude comparator is a combinational circuit that compares two numbers, A and B, and determines their relative magnitudes. The outcome of the comparison is specified by three binary variables that indicate whether a>b, A = b, or A < B.
36) What are decoders?
A decoder is a combinational circuit that converts binary information from n input lines to a maximum of 2n unique output lines. If the n bit coded information has unused combinations, he decoder may have fewer than 2n outputs.
37) What are encoders?
An encoder is a digital circuit that performs the inverse operation of a decoder. An encoder has 2n and n output lines. The output lines generate the binary code corresponding to the input value.
38) Define priority encoder?
A priority encoder is an encoder circuit that includes the priority function. The operation of priority encoder is such that if two or more inputs are equal to 1 at the same time, the input having the highest priority will take precedence.
39) Define multiplexer?
A multiplexer is combinational circuit that selects binary information from one of many input lines and directs it to a single output line. The selection of a particular input line is controlled by a set of selection lines. Normally there are 2n input lines and n selection lines whose bit combinations determine which input is selected.
40) Define binary decoder?

A decoder which has an n- bit binary input code and a one activated output out-of -2n output code is called binary decoder. A binary decoder is used when it is necessary to activate exactly one of 2n outputs based on an n-bit input value.

Unit-1(2-MARKS)

1) What are basic properties of Boolean algebra? 
The basic properties of Boolean algebra are commutative property, associative Property
and distributive property.

2) State the associative property of boolean algebra. 
The associative property of Boolean algebra states that the OR ing of several variables
results in the same regardless of the grouping of the variables. The associative property is stated
as follows:
 A+ (B+C) = (A+B) +C

3) State the commutative property of Boolean algebra.
The commutative property states that the order in which the variables are OR ed makes
no difference. The commutative property is:
 A+B=B+A

4) State the distributive property of Boolean algebra.
The distributive property states that AND ing several variables and OR ing the result
With a single variable is equivalent to OR ing the single variable with each of the the several
Variables and then AND ing the sums. The distributive property is:
 A+BC= (A+B) (A+C)

5) State the absorption law of Boolean algebra. 
The absorption law of Boolean algebra is given by X+XY=X, X(X+Y) =X.

6) State De Morgan's theorem. 
De Morgan suggested two theorems that form important part of Boolean algebra. They
are,
 1) The complement of a product is equal to the sum of the complements.
 (AB)' = A' + B'
 2) The complement of a sum term is equal to the product of the complements.
 (A + B)' = A'B'

7) Reduce A (A + B) 
 A (A + B) = AA + AB
 = A (1 + B) [1 + B = 1]
= A.

8) Reduce A'B'C' + A'BC' + A'BC 

A'B'C' + A'BC' + A'BC = A'C'(B' + B) + A'B'C
= A'C' + A'BC [A + A' = 1]
= A'(C' + BC)
= A'(C' + B) [A + A'B = A + B]

9) Reduce AB + (AC)' + AB’C (AB + C) 
AB + (AC)' + AB’C (AB + C) = AB + (AC)' + AAB'BC + AB'CC
= AB + (AC)' + AB'CC [A.A' = 0]
= AB + (AC)' + AB'C [A.A = 1]
= AB + A' + C' =AB'C [(AB)' = A' + B']
= A' + B + C' + AB'C [A + AB' = A + B]
= A' + B'C + B + C' [A + A'B = A + B]
= A' + B + C' + B'C
=A' + B + C' + B'
=A' + C' + 1
= 1 [A + 1 =1]


10) Simplify the following expression Y = (A + B) (A + C’) (B' + C’) 
Y = (A + B) (A + C’) (B' + C’)
= (AA' + AC +A'B +BC) (B' + C') [A.A' = 0]
= (AC + A'B + BC) (B' + C’)
= AB'C + ACC' + A'BB' + A'BC' + BB'C + BCC'
= AB'C + A'BC'
11) Show that (X + Y' + XY) (X + Y') (X'Y) = 0
(X + Y' + XY)(X + Y')(X'Y) = (X + Y' + X) (X + Y’) (X' + Y) [A + A'B = A + B]
= (X + Y’) (X + Y’) (X'Y) [A + A = 1]
= (X + Y’) (X'Y) [A.A = 1]
= X.X' + Y'.X'.Y
= 0 [A.A' = 0]


12) Prove that ABC + ABC' + AB'C + A'BC = AB + AC + BC 
ABC + ABC' + AB'C + A'BC=AB(C + C') + AB'C + A'BC
=AB + AB'C + A'BC
=A(B + B'C) + A'BC
=A(B + C) + A'BC
=AB + AC + A'BC
=B(A + C) + AC
=AB + BC + AC
=AB + AC +BC ...Proved


13) Convert the given expression in canonical SOP form Y = AC + AB + BC 
Y = AC + AB + BC
=AC (B + B’) + AB (C + C’) + (A + A') BC
=ABC + ABC' + AB'C + AB'C' + ABC + ABC' + ABC
=ABC + ABC' +AB'C + AB'C' [A + A =1]

14) Define duality property. 
Duality property states that every algebraic expression deducible from the postulates Of
Boolean algebra remains valid if the operators and identity elements are interchanged. If
the dual of an algebraic expression is desired, we simply interchange OR and AND operators and
replace 1's by 0's and 0's by 1's.


15) Find the complement of the functions F1 = x'yz' + x'y'z and F2 = x (y'z' + yz). 
 By applying De-Morgan's theorem. 

F1' = (x'yz' + x'y'z)' = (x'yz')'(x'y'z)' = (x + y' + z)(x + y +z')
F2' = [x (y'z' + yz)]' = x' + (y'z' + yz)'
= x' + (y'z')'(yz)'
= x' + (y + z) (y' + z')

16) Simplify the following expression 
Y = (A + B) (A = C) (B + C)
= (A A + A C + A B + B C) (B + C)
= (A C + A B + B C) (B + C)
= A B C + A C C + A B B + A B C + B B C + B C C
= A B C

17) Given the two binary numbers X = 1010100 and Y = 1000011, perform the subtraction (a) X -Y and (b) Y - X using 2’s complements.
a) X = 1010100
 2’s complement of Y = + 0111101 --------------
 Sum = 10010001
 Discard end carry
Answer: X - Y = 0010001
b) Y = 1000011
 2’s complement of X = + 0101100 ---------------
Sum = 1101111
 There is no end carry,
 Therefore the answer is Y-X = -(2’s complement of 1101111) = -0010001
18). Given the two binary numbers X = 1010100 and Y = 1000011, perform the subtraction (a) X -Y and (b) Y - X using 1’s complements.
a). X - Y = 1010100 – 1000011
 X = 1010100
1’s complement of Y = + 0111100 --------------
Sum = 10010000
End -around carry = + 1 --------------
Answer: X - Y = 0010001
b). Y - X = 1000011 – 1010100
 Y = 1000011
1’s complement of X = + 0101011 -----------
 Sum = + 1101110
There is no end carry.
Therefore the answer is Y - X = -(1’s complement of 1101110) = -0010001

19). what is meant by parity bit?
A parity bit is an extra bit included with a message to make the total number of 1’s either even or odd. Consider the following two characters and their even and odd parity: With even parity with odd parity ASCII A = 1000001 01000001 11000001, ASCII T = 1010100 11010100 01010100. In each case we add an extra bit in the left most position of the code to produce an even number of1’s in the character for even parity or an odd number of 1’s in the character for odd parity. The parity bit is helpful in detecting errors during the transmission of information from one location to another.

20).What are registers?
Register is a group of binary cells. A register with n cells can store any discrete quantity of information that contains n bits. The state of a register is an n-tuple number of 1’s and 0’s, with each bit designating the state of one cell in the register.

21). What is meant by register transfer?
A register transfer operation is a basic operation in digital systems. It consists of transfer of binary information from one set of registers into another set of registers. The transfer may be direct from one register to another, or may pass through data processing circuits to perform an operation.

22). Define binary logic?
Binary logic consists of binary variables and logical operations. The variables are designated by the alphabets such as A, B, C, x, y, z, etc., with each variable having only two distinct values: 1 and 0. There are three basic logic operations: AND, OR, and NOT.

23). Define logic gates?
Logic gates are electronic circuits that operate on one or more input signals to produce an output signal. Electrical signals such as voltages or currents exist throughout a digital system in either of two recognizable values. Voltage- operated circuits respond to two separate voltage levels that represent a binary variable equal to logic 1 or logic 0.

24).Define duality property.
Duality property states that every algebraic expression deducible from the postulates of Boolean algebra remains valid if the operators and identity elements are interchanged. If the dual of an algebraic expression is desired, we simply interchange OR and AND operators and replace 1’s by 0’s and 0’s by 1’s.

25.Find the complement of the functions F1= x’yz’ + x’y’z and F2= x(y’z’ + yz) by applying De Morgan’s theorem as many times as necessary.
F1’ = (x’yz’ + x’y’z)’ = (x’yz’)’(x’y’z)’ = (x + y’ + z)(x + y +z’)
F2’ = [x(y’z’ + yz)]’ = x’ + (y’z’ + yz)’ = x’ + (y’z’)’(yz)’
      = x’ + (y + z)(y’ + z’)
26).Find the complements of the functions F1 = x’yz’ + x’y’z and F2 = x(y’z’ + yz)  by taking their duals and complementing each literal.
F1= x’yz’ + x’y’z. The dual of F1 is (x’ + y + z’)(x’ + y’ + z).
 Complementing each literal: (x + y’ + z)(x + y + z’)
 F2= x(y’z’ + yz). The dual of F2 is x + (y’ + z’)(y + z).
Complement of each literal: x’ + (y + z)(y’ + z’)

27).Convert the given expression in canonical SOP form Y = AC + AB + BC
Y = AC + AB + BC
=AC(B + B’ ) + AB(C + C’ ) + (A + A’)BC
=ABC + ABC’ + AB’C + AB’C’ + ABC + ABC’ + ABC
 =ABC + ABC’ +AB’C + AB’C’ [A + A =1]
28).Convert the given expression in canonical POS form Y = ( A + B)(B + C)(A + C)
Y = ( A + B)(B + C)(A + C)
 = (A + B + C.C’ )(B + C + A.A’ )(A + B.B’ + C)
= (A + B + C)(A + B + C’ )(A + B +C)(A’ + B +C)(A + B + C)(A + B’ + C) [A + BC = (A + B)(A + C) Distributive law]
= (A + B + C)(A + B + C’)(A’ + B + C)(A’ + B + C)(A + B’ + C)
29). Find the minterms of the logical expression Y = A’B’C’ + A’B’C + A’BC + ABC’
Y = A’B’C’ + A’B’C + A’BC + ABC’ =m0 + m1 +m3 +m6 =ôP____________


30).Write the maxterms corresponding to the logical expression Y = (A + B + C’ )(A + B’ + C’)(A’ + B’ + C)
Y = (A + B + C’ )(A + B’ + C’)(A’ + B’ + C) =M1.M3.M6 =ö0_______

31).Convert (4021.2)5to its equivalent decimal.
(4021.2)5= 4 x 53+ 0 x 52+ 2 x 51+ 1 x 50+ 2 x 5-1
= (511.4)10


32) Using 10’s complement subtract 72532 – 3250
M = 72532 10’s complement of N = + 96750 -----------
 Sum = 169282
Discard end carry
Answer = 69282

33) What are called don’t care conditions?
In some logic circuits certain input conditions never occur, therefore the corresponding output never appears. In such cases the output level is not defined, it can be either high or low. These output levels are indicated by ‘X’ or‘d’ in the truth tables and are called don’t care conditions or incompletely specified functions.

34) Write down the steps in implementing a Boolean function with levels of NAND Gates?
Simplify the function and express it in sum of products. Draw a NAND gate for each product term of the expression that has at least two literals. The inputs to each NAND gate are the literals of the term. This constitutes a group of first level gates. Draw a single gate using the AND-invert or the invert-OR graphic symbol in the second level, with inputs coming from outputs of first level gates. A term with a single literal requires an inverter in the first level. How ever if the single literal is complemented, it can be connected directly to an input of the second level NAND gate.

35) Give the general procedure for converting a Boolean expression in to multilevel NAND diagram?

Draw the AND-OR diagram of the Boolean expression. Convert all AND gates to NAND gates with AND-invert graphic symbols. Convert all OR gates to NAND gates with invert-OR graphic symbols. Check all the bubbles in the same diagram. For every bubble that is not compensated by another circle along the same line, insert an inverter or complement the input literal. 

BE-2/4-Sem-1-LOGIC AND SWITCHING THEORY-OSMANIA UNIVERSITY CSE Dept- SYLLABUS

LOGIC AND SWITCHING THEORY

Instruction                                                4              Periods per week
Duration of University Examination      3              Hours
University Examination                          75            Marks
Sessional                                                   25            Marks

UNIT-I

Digital Computers and Information: Information representation, Computer Structure.

Number Systems: Binary Numbers, Octal and Hexadecimal Numbers, Number Ranges.

Arithmetic Operations: Conversion from Decimal to other bases. Decimal Codes: BCD Addition. Alphanumeric Codes: ASCII Character Code, Parity Bit.

Binary Logic and Gates: Binary Logic, Logic Gates. Boolean Algebra: Basic Identifiers, Algebraic Manipulation, Complement of a Function.

Standard Forms: Minterms and Maxterms, Sum of Product and Products of Sums.

UNIT-II

Minimization of Switching Functions: Introduction, the map method, Minimal Functions and Their Properties, the tabulation procedure, the prime implicant chart.

NAND and NOR Gates: Nand Circuits, Two-level Implementation, Multilevel NAND Circuits, NOR Circuits. Exclusive OR Gates: Odd Function, Parity Generation and Checking.

UNIT-III

Combination Logic Design: Combinational Circuits, Design Topics: Design Hierarchy, Top –Down design, Computer Aided Design, Hardware Description Languages, Logic Synthesis. Analysis Procedure: Derivation of Boolean Functions, Derivation of the Truth Table, Logic Simulation, Design Procedure, Decoders, Encoders, Multiplexers, Binary Adders, Binary subtraction, Binary Multipliers, HDL Representations- VHDL.

UNIT-IV

Sequential Circuits: Sequential Circuit definitions. Latches, Flip Flops, sequential circuit analysis, sequential circuit design, design with D Flip Flops, designing with JK Flip- Flops, HDL representation for sequential circuits-VHDL.

UNIT-V

Registers and Counters: Registers, Shift registers, Synchronous Binary counters, Ripple Counter.

Symmetric Networks: Properties of Symmetric Functions, Synthesis of Symmetric networks, identification of symmetric functions.

Suggested Reading:
 1.M. Moris Mano, Charles R. Kime, Logic and Computer Design Fundamentals, 2nd edition, Pearson Education Asia, 2001.
 2.Zvi Kohavi, Switching and Finite Automata Theory, 2nd edition, Tata McGraw Hill, 1995.
 3.Charles H. Roth, Jr Fundamentals of Logic Design, 5th edition, Thomson, Brook,Cole, 2005.

Monday, 10 February 2014

Data Communication Important Questions-Osmania University

Unit-1

  1. Write short notes on :Protocol Architecture.
  2. Discuss TCP / IP protocol layer architecture and functions in detail.(**)
  3. Write short note on  (c) Line Configuration.-5
  4. List and explain transmission impairments.
  5. Write short notes on any two of the following:
(a)    Pulse code modulation and delta modulation.

  1. Compare the three basic modulation techniques for transforming digital data into analog signals. (5)
  2. What is pulse stuffing? Explain how it is helpful in design of TEDM. (5)
  3. (b) Explain the concept of Delta Modulation.***
  4. (a) Draw the wave forms and explain the following coding schemes:

(a)    Bipolar-AMI (ii) Differential Manchester

  1. Explain Data Communications Interfacing with neat diagrams.
  2. Explain about Amplitude modulation and Angle modulation. 10
  3. Differentiate between Amplitude shift keying, frequency shift keying and phase shift keying. (4)
Unit:2
 


 
  1. Write about on error detecting and one error correcting codes. Explain with examples.
  2. Elaborate On data transmission techniques.
  3. Explain the Transmission modes, transmission characteristics and categories of applications of optical fiber. . (5)
  4. Explain the different phases of HDLC with suitable example. (5)
  5. What are the topology options for Fiber channel?
  6. Explain how the Go-Back-N Arq technique can handle different specific cases or contingencies.
  7. Discuss the mechanisms of sliding-window flow control.
  8. State the purpose of ARQ and explain stop and wait ARQ.
  9. Explain HD LC protocol in detail.****
  10. Explain HDLC frame structure.
  11. Explain in-detail Cyclic Redundancy Check (CRC) error detection technique with suitable examples. 10
  12. Write about Line-of-sight Transmission.
  13. A channel has a data rate of 4 kbps and a propagation delay of
 20 ms. For what range of frame sizes does stop-and-wait give an efficiency of at least 50% ?
 
Unit:3 
  1. Give architecture of ATM and explain its logical connections and cells.
  2. Describe Frame relay.
  3. Elaborate on various methods of multiplexing.
  4. Contrast the architecture of a traditional telephone network circuit switch with soft switch architecture. Explain how flexibility has been achieved in soft switch architecture.
  5. Draw the Event timing diagram to bring out differences between circuit switching and packet switching.
  6. What is the need for ATM adaptation layer? What are some of the protocols and services provided by the AAL ? (10)
  7. What are the characteristics of virtual channel convections?
  8. Draw and explain the ATM cell format 5
  9. Explain the concepts of packet switching and how routing is done in packet switching.
  10. Write short notes on any two of the following:
    1. ADSL
  11. Explain in detail about statistical time division multiplexing.
  12. Explain in detail about xDSL.
  13. The difficult problem in the design of a synchronous time division multiplexer is that of synchronizing the various data sources.How can this problem be overcome? Explain with suitable example
  14. What are the advantages and disadvantages of Frame Relay over X.25 ?
  15. What are the different categories and types of services that can handled by ATM network
  16. Give a comparison of the circuit switching, datagram packet switching and virtual circuit packet switching Techniques.
Unit:4

Discuss Ethernet and token ring by giving their frame formats. Explain the significance of each field.

 

Differentiate Ethernet and token ring.

(c) LANs. Transmission media.

(c) Layer 2 and Layer 3 switches

14. (a) Describe the operation of CSMAjCD.

(b) Write short notes on -virtual LANs.

(b) List various LAN topologies and explain the frame transmission in each LAN

topology. .. 6

ExplainLANprotocolarchitecture.

Explainfunctionsof aBridge. 10

a)      Layer 2 switches,

14. (a) Write about layer 2 and layer 3 switches.

(b) Explain briefly about Gigabit ethemet.

 

16. (a) Explain key elements such as topology, medium access control of LAN.

(I) Bridge protocol architecture (c) Fibre channel topologies

 

Unit:5
 
Discuss cellular wireless networks of third generation systems.
Describe IEEE 802.11.
How medium access control is done is wireless LANs?
discuss the  architecture and services defined by1 EEE 802.11.
Write short notes on any two of the following:
(a) Frequency hopping spread spectrum and direct sequence
spread spectrum.
(b) Typical call between two mobile users within an area controlled
by a single MTSO.
 
Explain Bluetooth architecture.
16. a) Give overview of operation of cellular systems.
15. Write about IEEE 802.11 architecture and services.
17. Write short notes on any two of the following:
(a) HDLC
(b) xDSL
(c) Overview of cellular systems.
Draw and explain the 1EEE 802.11 MAC Frame Format. (3)
What are the advantages and disadvantages of using CDMA for
cellular network?