Pin Diagram of 8085 Microprocessor

8085 -Pin Diagram:

Power supply and Frequency signals:

Pin-1,2: x1,x2 are also called  crystal input pins.8085 can generate clock signals internally.To generate clock signals,8085 require external inputs from  X1,X2.X1,X2 are the inputs from the crystal or clock  generating circuit.The frequency is internally divided by 2.As we know that the basic operating timing frequency of the microprocessor is 3 MHz so 6 MHz frquency is applied.

Pin 37:  CLK (OUT):An output clock pin to drive the clock of the rest of the system.

Pin-40:  Vcc is +5v pin,Pin-20:Vss is ground pin.

Pin -4: SID(Serial Input Data)It takes 1 bit input from serial port of 8085.Stores the bit at the 8th position of the Accumilator.RIM(Read Interrupt Mask)instruction is used to transfer the bit

Pin -5: SOD(Serial Output Data)SOD: It takes 1 bit from accumulator to serial port of 8085.Takes the bit from 8th position of the accumulator.SIM(Set Interrupt Mask)instruction is used to transfer the bit

Pin:36: RESET IN-It is used to reset the microprocessor.It is active low signal,when the signal on this pin is low for at least 3 clock cycles it forces the microprocessor to reset itself

Pin-3: RESET OUT:It is an output signal. Active High signal. The output on this pin goes high whenever RESET IN is given low signal

Interrupt Signals: We know that signals like TRAP, RST 5.5 etc. are interrupt signals. Such signals come under this category.Hardware Interrupts-There are 5 pins for hardware interrupts-
TRAP, RST7.5, RST 6.5, RST5.5 and INTR

Classification of Interrupts

1.       Maskable (M)and Non Maskable (NM),Vectored(V) and Non vectored(NV),Edge triggered(E) and Level Triggered(L), Priority Based Interrupts

INTA’:Whenever the microprocessor receives interrupt signal. It has to be acknowledged. This acknowledgement is done by INTA’. So whenever the interrupt is received INTA’ goes high.

Address Bus:The pins A8-A15 denote the address bus. They are used for the most significant bit of memory address.

Address/Data Bus:AD0-AD7 constitutes the Address/Data bus. They are time multiplexed. These pins are used for least significant bits of address bus in the first machine clock cycle and used as data bus for second and third clock cycle.

ALE: Address Latch Enable:It indicates whether bus functions as address bus or data bus.If ALE=1 then bus function as address bus,                      If ALE=0 then bus function as data bus

IO/M’:Consider we have an address to be processed. But how do the processors know whether the address is for memory or I/O functions? For this purpose a status signal called IO/M’ is used. This distinguishes whether the address is for memory or IO. When this pin goes high, the address is for an I/O device. While the pin goes low, the address is assigned for the memory.

S0-S1:S0 and S1 are status signals which provides different status and functions depending on their status.

RD’:This is an active low signal. That is, an operation is performed when the signal goes low. This signal is used to control READ operation of the microprocessor. When this pin goes low the microprocessor reads the data from memory or I/O device.

WR’:WR’ is also an active low signal which controls the write operations of the microprocessor. When this pin goes low, the data is written to the memory or I/O device.

READY:READY is used by the microprocessor to check whether a peripheral is ready to accept or transfer data. A peripheral may be a LCD display or analog to digital converter or any other. These peripherals are connected to microprocessor using the READY pin. If READY is high then the periphery is ready for data transfer. If not the microprocessor waits until READY goes high.

HOLD: This indicates if any other device is requesting the use of address and data bus. Consider two peripheral devices. One is the LCD and the other Analog to Digital converter. Suppose if analog to digital converter is using the address and data bus and if LCD requests the use of address and data bus by giving HOLD signal, then the microprocessor transfers the control to the LCD as soon as the current cycle is over. After the LCD process is over, the control is transferred back to analog and digital converter.

HLDA: HLDA is the acknowledgment signal for HOLD. It indicates whether the HOLD signal is received or not. After the execution of HOLD request, HLDA goes low.